A bidirectional shift register can shift either left or right. A universal shift register adds parallel loading and holding. A mode input selects the next-state source for each stored bit, often through a multiplexer before each flip-flop.
Worked example
Define modes 00 = hold, 01 = shift right, 10 = shift left, and 11 = parallel load. Starting at 1010, a logical right shift with zero serial fill gives 0101. A parallel-load mode ignores that shifting rule and captures the full input word.
What to watch for
The mode encoding is a design choice. Define both serial inputs and which one is used for each direction; the opposite serial input should not accidentally affect the result.
Try it yourself
With Q = 0011, what does logical left shift with zero fill produce in four bits?
Answer: 0110. The high bit is discarded and zero enters the low position.
How to study this topic
Define the reset state and update rule before tracing a sequence. List several successive states by hand and check the wraparound. Bit direction, enable behavior and illegal-state handling are part of the specification.
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Digital Electronics