SRAM stores bits in bistable circuit cells and retains them while powered without periodic refresh. DRAM stores charge in compact cells and requires refresh to preserve data. Both are volatile. Their different cell structures lead to tradeoffs in density, access organization and power.
Worked example
A processor can use SRAM-like structures for small, fast caches, while a larger main memory commonly uses DRAM. If a DRAM cell's charge is not refreshed in time, its stored interpretation can be lost even though the system still has power.
What to watch for
Static does not mean SRAM retains data after power removal. DRAM read, refresh and access behavior belongs to its memory interface and controller specification.
Try it yourself
Which memory type needs periodic refresh, SRAM or DRAM?
Answer: DRAM. SRAM maintains its bistable state while adequate power is present.
How to study this topic
Separate the ideal logical model from the physical device interface. Write units beside capacities, voltages and timing values. The architecture explains the idea; the chosen part's documentation supplies the operating limits.
Explore related programmes
These recorded programmes are upcoming. This article is general educational content, not a syllabus or course sample.
Digital Electronics